1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device, more particularly, to a non-volatile semiconductor memory device using an electrically erasable programmable read only memory (EEPROM) cell, a dummy cell, and a sense circuit.
2. Description of the Related Art
Recently, EEPROMs, which can be reprogrammed by electrically erasing the contents previously programmed therein, have come to be preferred over EPROMs which are erased by being irradiated with ultraviolet light. For example, an EEPROM can be used for on-vehicle equipment (e.g., for setting control parameters or codes suitable for an application environment), a measuring apparatus, a camera, a telephone set (e.g., for storing telephone numbers), a telemetering system, a fuzzy control apparatus, and the like. Generally, in the EEPROM, a plurality of bits of a specific group (for example, each column unit, or each word unit) are erased together, and thus a non-volatile semiconductor memory device (EEPROM), which enables a read/erase operation of only one required bit in one operation (operation cycle), is required.
For example, a non-volatile semiconductor memory device according to the prior art comprises an EEPROM cell, transfer gates for selecting the EEPROM cell in response to a select signal applied to a word select line WSL, a write/erase circuit, and a current sense type sense circuit. The EEPROM cell includes a control electrode, a floating gate, a drain, and a source.
Further, in the prior art, a non-volatile semiconductor memory device using a differential sense circuit has been proposed in "An Experimental 5-V-Only 256-kbit CMOS EEPROM with a High-Performance Single-Polysilicon Cell" (IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-21. No 5. OCTOBER 1986).
Note, in these non-volatile semiconductor memory devices (EEPROMs), a plurality of bits of a specific group (for example, each column unit, or each word unit) are erased, and an erase cycle and a write cycle are carried out individually, so that the required time for a rewriting operation becomes long. Further, since the cell to be written into is previously erased and is then rewritten the cell itself is deteriorated. Furthermore, in a non-volatile semiconductor memory device using a differential sense circuit according to the prior art, the required time for a rewriting operation becomes long and cells are deteriorated in a short time, because an erase operation and a write operation are individually carried out.
In addition, in the prior art, a plurality of single polysilicon EEPROM cells are developed and provided. For example, such single polysilicon EEPROM cells are disclosed in Japanese Unexamined Patent Publication (Kokai) No. 59-155968 (corresponding to U.S. Pat. No. 4,642,673), Japanese Unexamined Patent Publication (Kokai) No. 63-156361 (corresponding to U.S. Pat. No. 4,807,003), Japanese Unexamined Patent Publication (Kokai) No. 63-166274, and the like. These single polysilicon EEPROM cells can be used in a non-volatile semiconductor memory device according to the present invention.